74AUP2G79 Datasheet Low-power dual D-type flip-flop

Manufacturer: NXP Semiconductors

Overview: www.DataSheet4U.com 74AUP2G79 Low-power dual D-type ﬂip-ﬂop; positive-edge trigger Rev. 02 — 19 March 2008 Product data sheet 1.

Datasheet Details

Part number	74AUP2G79
Manufacturer	NXP Semiconductors
File Size	146.02 KB
Description	Low-power dual D-type flip-flop
Download	74AUP2G79 Download (PDF)

The 74AUP2G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114E Class 3A exceeds 5000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101-C exceeds 1000 V I Low static power consumption; ICC = 0.9 µA (maximum) I Latch-up performance exceeds 100 mA per JESD78 Class II I Inputs accept.

Brand Logo	Part Number	Description	Manufacturer
	74AUP2G79	Low-power dual D-type flip-flop	nexperia
	74AUP2G79-Q100	Low-power dual D-type flip-flop	nexperia

Part Number	Description
74AUP2G07	Low-power dual buffer
74AUP2G125	Low-power dual buffer/line driver
74AUP2G17	Low-power dual Schmitt trigger
74AUP2T1326	Low-power Dual Supply Buffer/line Driver
74AUP1G00	Low-power 2-input NAND gate
74AUP1G04	Low-power inverter
74AUP1G06	Low-power inverter
74AUP1G07	Low-power buffer
74AUP1G08	Low-power 2-input AND gate
74AUP1G125	Low-power buffer/line driver